The present invention relates, in general, to integrated circuit packages. More particularly, the invention relates to a pin grid array (PGA) integrated circuit package having an internal transmission line.
A crucial step in manufacturing integrated circuits is packaging those circuits so that the package itself does not degrade or limit the electrical performance of the integrated circuit. A package provides electrical coupling between a pin, which extends outside of the package, and a bonding pad of the integrated circuit. Operating speeds of integrated circuits have increased dramatically, particularly in communication applications where operating speeds may be 1 GHz or more. At the same time, circuits have become more complex, requiring more package pins to conduct signals to and from the integrated circuit. Increasing numbers of package pins result in larger packages, and pins which are farther away from the integrated circuit. Conductive lines are formed inside the semiconductor package to couple the pins to the integrated circuit, and larger packages result in correspondingly longer conductive lines. Longer conductive lines, for reasons described hereinafter, reduce the operating speed of the package, and thus limit the operating speed of the integrated circuit inside the package.
A common integrated circuit package type is a pin-grid-array (PGA) so called because it comprises a plurality of terminals, or pins, which are arranged in a grid on a substrate. Usually the substrate is a multi-layer sandwich of dielectric material and patterned metal layers. The substrate usually has a hole in the center in which an integrated circuit is mounted. The conductive lines which couple the package pins with the integrated circuit are formed by the patterned metal layers. In the past, a single conductive line coupled each pin with a package bond pad formed at an inner edge of the substrate, and a wire bond coupled the package bond pad with a bond pad on the integrated circuit. An external signal enters the package via the pin and is transferred to the integrated circuit via the signal line and wire bond. Because multiple layers of metal are used in the PGA package, the conductive line formed a stripline conductor, wherein the conductive line was sandwiched between two ground planes and isolated from the ground planes by a layer of dielectric material. These stripline conductors are also called signal lines, or transmission lines. The stripline conductor design reduced signal distortion as the signal traveled from the package pin to the integrated circuit, but due to the difficulties in adding terminating resistors the stripline conductors were not terminated, which resulted in large reflection voltages when signals had fast edge rates.
To achieve higher operating frequencies, clock signals and data signals must have faster edge rates. To minimize distortion, signals having fast edge rates are conducted external to the semiconductor package on signal lines having a constant characteristic impedance Z.sub.0, which is usually 50 ohms, and the signal lines are terminated with an impedance which matches the signal line. This is because when a signal having a fast edge rate is transmitted on a signal line with variable impedance, or which is not terminated with a matching impedance, at each impedance mismatch a portion of the signal is reflected back towards the signal source, and a portion is transmitted forward on the signal line. The magnitude of the reflected voltage is a function of the edge rate of the signal and the capacitance of the transmission line termination. The terminating resistance is coupled between the signal line and ground reference or a negative or positive power supply. The signal is coupled to a receiving gate, also called a receiving line, of an integrated circuit by a branch signal line coupled to the terminated transmission line. Unterminated signal lines which branch from a terminated transmission line will also cause reflected voltages, the magnitude of which is a function of signal edge rate and capacitance of the unterminated branch. Unterminated branches are also called "stubs" or "open lines". A terminated, impedance matched signal line will not add to the capacitance of a stub whereas an unterminated signal line will.
Three basic types of signal lines are commonly used: constant characteristic impedance lines which are terminated, constant impedance lines which are unterminated, and variable impedance lines which are unterminated. While a terminated variable impedance line is possible, it is usually not worth the added expense to terminate a signal line which has a variable impedance. External signal lines, which couple semiconductor packages with external circuitry, are usually the terminated, constant impedance type. Until now, internal signal lines, which couple the external signal line to the integrated circuit, have been of the other two types. Because of this, until now, semiconductor packages have been coupled to terminated external signal lines so that the package appeared as a stub on the external signal line. When edge rates were relatively slow, and the capacitance of this unterminated branch was relatively small, the reflected voltage caused by this stub was insignificant. More recently, however, the reflected voltage caused by the package has become a limiting factor in both edge rate speed and package size.
The capacitance of the package signal line is a sum of both the package capacitance and the capacitance of the receiving gate of an integrated circuit. The receiving gate of an integrated circuit will not be impedance matched to the external signal line, and so will necessarily be a capacitance stub. A typical package signal line had a capacitance of 4-10 pF, of which only 1-2 pF was caused by the receiving gate. Thus, the package itself added a majority of the capacitance to the package signal line.
Reflected signals from the package signal line caused several problems. First, the wave shape of the signal that reached the receiving gate was distorted because part of the signal had been reflected, resulting in slower rise times and lower operating frequency. Second, the reflected portion of the signal appeared as noise on the external signal line, reducing the noise margin of data on that line. Third, the reflected wave caused standing waves in the signal line, which caused the signal amplitude to increase and decrease depending on capacitance of the package and signal frequency, further reducing the noise margin. All of these problems were aggravated when signal edge rates increased. Eventually the receiving gate did not operate reliably because of the reduced noise margin.
It is often desirable to use a single external signal line to provide a signal, such as a clock signal, to several semiconductor packages. In the past, each package that was coupled to the signal line created reflected noise on the signal line. Since noise from each package accumulated on the signal line, the noise margin was reduced dramatically for each package added to the external signal line. Thus, when two or more packages were coupled in this fashion, operating frequency was greatly reduced to compensate for the reduced noise margin.
The primary cause of these problems is the capacitance of the unterminated transmission line formed by the conductive lines in the semiconductor package. In the past, the most straight forward solution was to design the integrated circuit so that it required fewer pins. Although this allowed the pins to be located closer to the integrated circuit, it posed obvious limitations on the circuit design. Another solution was to reduce the dimensions of the package pins and the conductor lines between the pins and the integrated circuit so that more pins can be placed in a smaller space. This also resulted in shorter conductive lines between pins and the integrated circuit, but increased difficulty of manufacturing a package and expense to the manufacturer. Until now, those types of solutions to the impedance mismatch problem have at best been able to reduce the effects of the capacitance of the connection between the package pin and the integrated circuit, but have been unable to eliminate them.
Accordingly, it is an object of the present invention to provide an integrated circuit package with a low reflection input configuration.
It is a further object of the present invention to provide an integrated circuit package with reduced impedance mismatch between the package and high frequency signal lines which are coupled to the package.
It is an additional object of the present invention to provide an integrated circuit package having an internal transmission line with a constant characteristic impedance which can be terminated.
It is a further object of the present invention to provide an integrated circuit package which eliminates the effects of capacitance due to a conductor between the package pin and the integrated circuit.
It is a still further object of the present invention to provide an integrated circuit package which is compatible with conventional pin-grid-array manufacturing techniques.
It is a further object of the present invention to provide an integrated circuit package having an input pin which can be coupled in series with other integrated circuit packages to a single external signal line.